【閱讀筆記】An Asynchronous Divider Implementation
這篇文章介紹了基於algorithm H【*】的非同步除法器。在一般的處理器中SRT除法器是比較常見的，但algorithm H也有其獨特的優勢（平均迭代次數少）。該文章使用GasP非同步控制電路實現了這個除法器，充分利用了非同步電路能夠獲得平均數據延時的特點，HSPICE模擬結果表明相比於SRT除法器，能夠獲得更少的FO4延時。
參考文章
Jamadagni N , Ebergen J . An Asynchronous Divider Implementation[C]// IEEE International Symposium on Asynchronous Circuits & Systems. IEEE Computer Society, 2012.
配合這篇文章一起閱讀更佳：
【*】New Division Algorithms by Digit Recurrence
Outline
?Basic Introduction
?Radix-2 SRT algorithm & algorithm H
?Implementation
?Results
Introduction
[1] M. Ercegovac and J. Muller, 「Digit-recurrence algorithms for division and square root with limited precision primitives,」 in Signals, Systems and Computers, 2003. Conference Record of the Thirty-Seventh Asilomar Conference on , vol. 2, nov. 2003, pp. 1440 – 1444 Vol.2.
[2] J. Ebergen, I. Sutherland, and A. Chakraborty, 「New division algorithms by digit recurrence,」 in Signals, Systems and Computers, 2004. Confer-ence Record of the Thirty-Eighth Asilomar Conference on , vol. 2, nov. 2004, pp. 1849 – 1855 Vol.2.
[3] J. Ebergen, I. Sutherland, and D. Cohen, 「Method and apparatus for performing a carry-save division operation,」 U.S. Patent 7 660 842, February 9, 2010
Radix-2 SRT algorithm & algorithm H
SRT演算法有一個csdn的栗子，比較通俗易懂。鏈接如下：
https://blog.csdn.net/alangaixiaoxiao/article/details/81624946
Implementation
Results
Conclusion
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